The TURBOchannel protocol specifies that each option has its own physical address space.
2.
The physical address space limitation for a single federation is in the millions of Terabytes range.
3.
MIPS32 and MIPS32r2 support 32 bits of virtual address space and up to 36 bits of physical address space.
4.
MIPS64 supports up to 64 bits of virtual address space and up to 59 bits of physical address space.
5.
It was possible to extend the Nord-10's physical address space beyond 64K up to a maximum of 256K 16-bit words.
6.
This would allow the processor to address 2 64 bytes ( 16 exabytes ) of virtual address space and 2 52 bytes ( 4 petabytes ) of physical address space.
7.
The chip added the ability to use all or half of its cache as high-speed, non-cached memory mapped to the processor's physical address space as desired.
8.
As of system version 11.1 . 0-X, the game is loaded in a PASLR ( physical address space layout randomization ) mode, and this temporarily broke the exploit.
9.
According to Morse et al ., . the designers actually contemplated using an 8-bit shift ( instead of 4-bit ), in order to create a 16 MB physical address space.
10.
The Model 200 provides 4 MB of physical address space for each TURBOchannel option, while the Model 240 and 260 provides 8 MB . TURBOchannel in the Model 240 and 260 is clocked at 25 MHz.